1.3.2 Dual Core Demo Application

A dual core device (e.g., PIC32CX2051MTSH128) has a Main core and Secondary core that can operate independently and can be developed separately during application development. Both processor (Main and Secondary) subsystems have their own interrupt controllers and clock generators.

The Main core and Secondary core each have their own program memory. On the PIC32CX-MT devices implementation, the Main program memory is Flash and the Secondary program memory is SRAM. In the application, the code for Main core and Secondary core is stored as a single hex file. This single hex file resides in the Main Flash.

On a POR, the Main must transfer the Secondary code from Flash to the Secondary SRAM. On a power loss, the Secondary SRAM will be lost, so on each power-up, the Main must repeat this process of transferring the Secondary code from Main Flash to Secondary SRAM.

The process of transferring the Secondary code from the Flash to the PRAM is done by software, so the Main core has full control of when to start the transfer. Once the Main core has completed the code transfer to the Secondary, the Main core has control of when to enable the Secondary core. This is also a part of the Main software, so the Main software can decide when to enable the Secondary core. Please refer to the device data sheet for more details.

The Main core and Secondary core each have their own data RAM, however Secondary RAM memory is shared with the Main core; RAM size is dependent on the device. Please check the specific device data sheet for the available RAM on each core.

An example of setting up the Primary and Secondary cores to program and debug is described in Dual Core Projects - PIC32CX MT Devices:

This demo application demonstrates how both applications (Main and Secondary) can be developed and also shows some dependencies between the initialization of both applications and the peripherals to be used.