1.28.4 Dual Watchdog Timer (DWDT)
The Dual Watchdog Timer (DWDT) is used to prevent system lock-up if the software becomes trapped in a deadlock. It features two 12-bit down counters that allow two watchdog periods of up to 16 seconds (Monitoring Domain Slow Clock (MD_SLCK) around 32 kHz). In addition, it can be stopped while the processor is in Debug mode or Sleep mode (Idle mode).
Using The Library
Dual watchdog timer is a combination of two watchdog timers:
-
A watchdog timer that operates in secure domain called programmable secure watchdog timer (PSWDT)
-
A watchdog timer that operates in non-secure domain called never secure watchdog timer (NSWDT)
PSWDT can reset the system upon detection of an overflow or repeat threshold violations. Both PSDWDT and NSWDT can generate interrupts upon detecting an overflow, repeat threshold violation or level threshold violation. PSWDT can also be configured such that the NSWDT interrupt can be rerouted to be generated in the secure domain.
Library Interface
Dual Watchdog Timer peripheral library provides the following interfaces:
Functions
| Name | Description |
|---|---|
| DWDT_Initialize | Initializes Dual watchdog timer peripheral |
| DWDT_PS_Clear | Clears the programmable secure watchdog timer |
| DWDT_PS_Disable | Disables the programmable secure watchdog timer |
| DWDT_NS_Clear | Clears the never secure watchdog timer |
| DWDT_NS_Disable | Disables the never secure watchdog timer |
| DWDT_PS_RegisterCallback | Allows application to register callback with PLIB |
| DWDT_NS_RegisterCallback | Allows application to register callback with PLIB |
Data types and constants
| Name | Type | Description |
|---|---|---|
| DWDT_CALLBACK | Typedef |