1.6.4 1.7.4 Clock Generator (CLOCK)

The PIC32CX_BZ clock system has the following modules and features:

  • A total of five external and internal oscillator options as clock sources

  • Provides control registers for all PLLs

  • Provides for glitch-free clock switching between various clock sources

  • Post dividers on processor clock generator to slow down system clock for power save

  • A fail safe clock monitor that detects clock failure and provides automatic switching to the FRC

  • Provides control registers for user interface of clocks and resets

  • Provides configuration bits for oscillator selection and calibration of on-chip oscillators

  • Provides control registers to generate a reference clock output

  • Multiple PB clock dividers

  • One System Clock, cru_sys_clk, from which almost all clocks used throughout the system are derived

  • Three Peripheral Clocks, created by independent integer dividers of the sys_clk

  • Six Reference Output Clocks (REFO1 - REFO6) with the following clock sources

  • JTAG TCK clock control

Using The Library

The Clock peripheral library initializes the clock system as configured by the user in the MHC easy view.

Library Interface

Clock Generator peripheral library provides the following interfaces:

Functions

Name Description
CLK_Initialize Initializes hardware of the System Clock and Peripheral Clock