1.25.7 1.27.6 LCD Controller (LCDC)
The LCD Controller (LCDC) consists of logic for transferring LCD image data from an external display buffer to an LCD module. The LCD has one display input buffer per overlay that fetches pixels through the dual AHB master interface and a lookup table to allow palletized display configurations.
The LCD controller is programmable on a per overlay basis, and supports different LCD resolutions, window sizes, image formats and pixel depths. The LCD is connected to the ARM Advanced High Performance Bus (AHB) as a master for reading pixel data. It also integrates an APB interface to configure its registers.
Using The Library
Refer LCDC API headers for the usage of the LCDC peripheral library.
Library Interface
LCD Controller peripheral library provides the following interfaces:
Functions
Name | Description |
---|---|
LCDCx_AddToQueueEnable | Indicates that a valid descriptor has been written to memory |
LCDCx_ClockReset | Resets the pixel clock module |
LCDCx_DISPSignalReset | Resets the DISP signal |
LCDCx_GetDisplaySignalStatusActivated | Gets the status of the DISP signal |
LCDCx_GetPixelClockStatusRunning | Gets the status of the pixel clock |
LCDCx_GetPWMSignalStatusActivated | Gets the status of the PWM signal |
LCDCx_GetSynchronizationStatusInProgress | Gets the status of clock domain synchronization |
LCDCx_GetTimingEngineStatusRunning | Gets the status of the timing engine |
LCDCx_IRQ_CallbackRegister | Registers a callback function for the LCDC IRQ handler |
LCDCx_IRQ_Disable | Disables the specified interrupt |
LCDCx_IRQ_Enable | Enables the specified interrupt |
LCDCx_IRQ_Status | Reads the value of the interrupt status register |
LCDCx_LAYER_IRQ_Disable | Disable the interrupt from the specified layer |
LCDCx_LAYER_IRQ_Enable | Enables the interrupt from the specified layer |
LCDCx_LAYER_IRQ_Status | Reads the status of the interrupt from the specified layer |
LCDCx_PWMReset | Resets the PWM module |
LCDCx_SetBlenderDMALayerEnable | Enables/disables the blender DMA channel |
LCDCx_SetBlenderGlobalAlpha | Sets the global alpha blending coefficient |
LCDCx_SetBlenderGlobalAlphaEnable | Enables/disables global alpha blending |
LCDCx_SetBlenderIteratedColorEnable | Enables use of iterated pixel value for final adder stage operand |
LCDCx_SetBlenderLocalAlphaEnable | Enables/disables local alpha blending |
LCDCx_SetBlenderOverlayLayerEnable | Enables/disables the overlay blender |
LCDCx_SetBlenderUseIteratedColor | Enables use of iterated pixel value for pixel difference |
LCDCx_SetChannelEnable | Enables/disables the DMA channel |
LCDCx_SetClockDivider | Sets the clock divider for the pixel clock |
LCDCx_SetClockSourceSelection | Sets the LCDC clock source |
LCDCx_SetDisplayGuardTime | Number of frames inserted before and after DISP assertion |
LCDCx_SetDisplaySignalPolarity | Sets the polarity of the DISP signal |
LCDCx_SetDisplaySignalSynchronization | Sets the sync of the DISP signal with the HYSNC pulse |
LCDCx_SetDISPSignalEnable | Enables/disables the DISP signal |
LCDCx_SetDitheringEnable | Enables/disables the LCDC dithering logical unit |
LCDCx_SetDMAAddressRegister | Sets the Frame Buffer base address |
LCDCx_SetDMADescriptorNextAddress | Sets next DMA descriptor address |
LCDCx_SetDMAHeadPointer | Sets the specified layer's Head Pointer to the DMA descriptor address |
LCDCx_SetHorizontalBackPorchWidth | Sets HSYNC front porch width, give in number of pixel clocks |
LCDCx_SetHorizontalFrontPorchWidth | Sets HSYNC front porch width, give in number of pixel clocks |
LCDCx_SetHSYNCPolarity | Sets the polarity of the HSYNC pulse |
LCDCx_SetHSYNCPulseWidth | Sets HSYNC pulse length, given in pixel clock cycles |
LCDCx_SetLayerClockGatingDisable | Disables/Enables the clock gating on the LCDC layers |
LCDCx_SetLCDDisableInterruptEnable | Enables/disables the LCD disable interrupt |
LCDCx_SetNumActiveRows | Sets the number of active lines (height) in the frame |
LCDCx_SetNumPixelsPerLine | Sets the number of pixels in a line (width) in the frame |
LCDCx_SetOutputMode | Sets the output mode of the LCDC |
LCDCx_SetPixelClockEnable | Enables/disables the pixel clock |
LCDCx_SetPixelClockPolarity | Sets the pixel clock signal polarity |
LCDCx_SetPostPocessingEnable | Enables/disables post processing |
LCDCx_SetPWMClockSourceSelection | Sets the LCDC PWM clock source |
LCDCx_SetPWMCompareValue | Sets the PWM compare value |
LCDCx_SetPWMEnable | Enables/disables the PWM signal |
LCDCx_SetPWMPrescaler | Sets the configuration of the counter prescaler module |
LCDCx_SetPWMSignalPolarity | Sets the polarity of the PWM signal |
LCDCx_SetRGBModeInput | Sets the input color mode for the specified layer |
LCDCx_SetSOFInterruptEnable | Enables/disables the start of frame interrupt |
LCDCx_SetSYNCEnable | Enables/disables the VSYNC and HSYNC signals |
LCDCx_SetTransferDescriptorFetchEnable | Enables/disables Transfer Descriptor Fetch |
LCDCx_SetUseDMAPathEnable | Enables/disables the DMA path for the specified layer |
LCDCx_SetVerticalBackPorchWidth | Sets VSYNC back porch width, give in number of lines |
LCDCx_SetVerticalFrontPorchWidth | Sets VSYNC front porch width, give in number of lines |
LCDCx_SetVSYNCPolarity | Sets the polarity of the VSYNC pulse |
LCDCx_SetVSYNCPulseEnd | Sets the HSYNC pulse edge where the VSYNC pulse second active edge is synchronized |
LCDCx_SetVSYNCPulseHoldConfig | Sets the VSYNC pulse sync with HSYNC pulse edge |
LCDCx_SetVSYNCPulseSetupConfig | Sets the VSYNC pulse sync with HSYNC pulse edge |
LCDCx_SetVSYNCPulseStart | Sets the HSYNC pulse edge where the VSYNC pulse first active edge is synchronized |
LCDCx_SetVSYNCPulseWidth | Sets VSYNC pulse length, given in pixel clock cycles |
LCDCx_SetWindowPosition | Sets the X, Y position of the specified layer |
LCDCx_SetWindowSize | Sets the size of the specified layer |
LCDCx_SYNCReset | Resets the timing engine |
LCDCx_UpdateAttribute | Updates the specified layer's window attributes |
LCDCx_UpdateOverlayAttributesEnable | Updates the layer attributes |
LCDCx_WaitForClockRunning | Waits for pixel clock to start running. Blocks until PCLK is running |
LCDCx_WaitForDISPSignal | Waits for DISP signal to be activated. Blocks until Timing engine is activated |
LCDCx_WaitForSynchronization | Waits for timing engine to start running. Blocks until Timing engine is running |
LCDCx_WaitForSyncInProgress | Waits for synchronization to complete. Unblocks when complete |
Data types and constants
Name | Type | Description |
---|---|---|
LCDCx_CLOCK_SOURCE | Enum | Defines the clock sources for the LCDC peripheral |
LCDCx_INPUT_COLOR_MODE | Enum | Defines the RGB color mode input types |
LCDCx_INTERRUPT | Enum | Defines the interrupts generated by the controller |
LCDCx_IRQ_CALLBACK | Typedef | Defines the data type and function signature for the LCDC callback function |
LCDCx_IRQ_CALLBACK_OBJECT | Struct | Struct for LCDC IRQ handler |
LCDCx_LAYER_ID | Enum | Defines the types for the LCDC hardware layers and overlays |
LCDCx_LAYER_INTERRUPT | Enum | Defines the interrupts generated by the layers |
LCDCx_OUTPUT_COLOR_MODE | Enum | Defines the controller output mode types |
LCDCx_PWM_CLOCK_SOURCE | Enum | Defines the clock sources for the LCDC PWM |
LCDCx_SIGNAL_POLARITY | Enum | Defines the polarity of the LCDC control signals |
LCDCx_VSYNC_SYNC_EDGE | Enum | Defines the HSYNC edge where VSYNC is synchronized |