1.41.6 1.42.5 Hardened External Memory Controller (HEMC)

Using The Library

The HEMC controller is initialized as configured in the MHC as part of System Initialization.

If interrupts are used, the callback function should be set for expected interrupts types:

    /* Register Fixable errors Callback */
    HEMC_FixCallbackRegister(HEMC_FixCallback_Function, (uintptr_t)NULL);
    /* Register UnFixable errors Callback */
    HEMC_NoFixCallbackRegister(HEMC_NoFixCallback_Function, (uintptr_t)NULL);

When an ECC error is detected and an interrupt occurs, the fail address must be read before the status in order to avoid multiple interrupts:

    /* Read the fault address before clearing the interrupt*/
    uint32_t* fault_pointer = (uint32_t*)HEMC_HeccGetFailAddress();

    /* Only for Fixable error handler : Read corrected data on the Fly */
    uint32_t fault_data = *fault_pointer;

    /* Read HEMC HECC Status */
    HEMC_HECC_STATUS value = HEMC_HeccGetStatus();

The faulty address may then be fixed by the application if applicable.

Error injection test mode

ECC Check bit read

The ECC check bit value can be get when the read test mode is activated. Once this mode is activated, the check bit value for each read of data on HSMC or HSDRAMC memories is stored in corresponding registers. It is possible to get the last check bit value using the \function HEMC_TestModeGetCbValue.

    /* Enable HEMC HECC Test mode Read in HSDRAMC memory */
    HEMC_TestModeReadEnable(HEMC_HEMC_CH_HSDRAMC);
    __DSB();
    __ISB();

    /* Read data in external memory */
    data = buffer;
    __DSB();
    __ISB();

    /* Get the Check Bit for last data read in HSDRAMC memory */
    tcb = HEMC_TestModeGetCbValue(HEMC_HEMC_CH_HSDRAMC);
    __DSB();
    __ISB();

    /* Disable HEMC HECC Test mode Read in HSDRAMC memory */
    HEMC_TestModeReadDisable(HEMC_HEMC_CH_HSDRAMC);

Note: It is recommended to use memory barriers on Cortex-M core-based products where instructions can be executed out of programmed order, or to ensure that all memory transfers or instructions are completed before any new instruction is executed. In our application, we must ensure that register modification and memory transfers are completed before executing the next step.

ECC Check bit write

The ECC check bit value can be override when the write test mode is activated. Once this mode is activated, the check bit value for each write of data on HSMC or HSDRAMC memories is override by the given value instead of being calculated automatically. The check bit value used should be set using the function HEMC_TestModeSetCbValue.

    /* Enable HEMC HECC Test mode Write in HSDRAMC memory */
    HEMC_TestModeWriteEnable(HEMC_HEMC_CH_HSDRAMC);
    __DSB();
    __ISB();

    /* Set the Check Bit for override when data will be write in external HSDRAMC memory */
    HEMC_TestModeSetCbValue(HEMC_HEMC_CH_HSDRAMC, tcb);
    __DSB();
    __ISB();

    /* Write data in external memory */
    buffer = data;
    __DSB();
    __ISB();

    /* Disable HEMC HECC Test mode Write in HSDRAMC memory */
    HEMC_TestModeWriteDisable(HEMC_HEMC_CH_HSDRAMC);

Note: It is recommended to use memory barriers on Cortex-M core-based products where instructions can be executed out of programmed order, or to ensure that all memory transfers or instructions are completed before any new instruction is executed. In our application, we must ensure that register modification and memory transfers are completed before executing the next step.

Library Interface

HEMC peripheral library provides the following interfaces:

Functions

Data types and constants